Using Virtual System Platforms for Product Development Author: Dhanabal Shanmugam Semiconductor product companies are always looking for alternate ways to squeeze product development cycle, deliver high quality products to the customer to get competitive advantage. In this article we will see how using virtual platforms for product development helps those companies. Need for Virtual System Platforms Two decades back most of the semiconductor chips required nearly 80% of development efforts for hardware design and verification than developing software for them. So companies managed to live with sequential development approach where software development is carried after hardware prototypes are made. But nowadays complex functionalities are expected to be supported on highly integrated hardware system (SoCs) that requires more than half of the product development effort for software development. So hardware and software co-design becomes necessary to reduce development cycle. In order to enable software development in parallel with hardware, companies developed models using high level or proprietary languages to emulate target hardware platform. These platforms are called Virtual System platforms. More About Virtual System Platforms Virtual system platforms are timing accurate (from software programs view) abstraction level model representation of real hardware recently been used by product companies to explore design architecture and for earlier software development. SystemC language is a widely used high-level language to develop abstraction level models to mimic target hardware functions and achieve higher execution MIPS (nearly 100MIPS). Higher simulation speed is achieved by removing detailed event based implementation, in contrast to RTL implementation, at places where timing accuracy is not needed from software point of view. Though virtual platforms help the product development companies in many ways it also requires some efforts and investment to model hardware close to real hardware. We will see who can benefit by investing on virtual platforms, · Companies working on highly competitive, shorter market window products like mobile handset chips, etc. · Products, which require more than 50% of product development effort for software development that targeted to run on special hardware platform. · Companies planning to enter into hardware products based on evolving technologies and wanting to get good grip on those technology specific future products. Initial investment on hardware model development can be reused for future products. Virtual Platforms for Hardware Verification Using Virtual Platform for product development not only enables early software development but also helps to verify hardware in short time with complex system scenarios as soon as hardware prototype is available. Generally integrated circuits are verified at block level or by creating simple system scenarios by the verification team. But nowadays most of the integrated circuits come with highly parallel hardware blocks, verifying them at block level would not be the best approach as it wouldn't guarantee how blocks will work together during complex system scenarios. Since virtual platform helps to develop stable system software before hardware is ready, verification team can directly go for complex system verification with hardware prototype. This approach enables product companies to deliver highly quality products to the customer in short period of time. We will see more about how virtual platforms are designed using SystemC in the future articles.
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